A Solution To CPU Strain
The information age is only getting more demanding with the sheer volume of visual data that needs to be captured and many setups are bottlenecked by having to operate at 100% CPU loads. For data intensive processes, such as analysing tissue cells for medical research or real time surveillance, you need consistent and uninterrupted data flow. Such demands are what has lead to the development of the latest CoaXPress 2.0 standard, where rates of up to 12.5 Gbps can be achieved
Euresys have an answer to such demands with their now popular Coaxlink Quad CXP-12 and the Coaxlink Octo. These next gen framegrabbers feature their specialised CustomLogic FPGA design kit which is designed to handle repetitive image preprocessing tasks for each pixel, such as noise reduction or flat field correction. By processing this directly on the framegrabber in parallel with the image transfer it frees up your CPU without latency.
Part of the secret to this success is with CustomLogic allowing users to create their own FPGA code, so any proprietary code is never revealed and incredibly hard to reverse engineer. The result allows you to free up to 70% resources, based on the Xilinx Kintex Ultrascale XCKU035 FPGAs used in the Coaxlink Quad CXP-12.
