Keeping Up To Speed With Standardised IP Cores

High speed interfaces have high demands

With the developments of CoaXPress 2.0, 10GigE and USB3.0, machine vision is experiencing a golden age of high speed data rates, clocking in at up to 12.5Gb/s, 10Gb/s and 625Mb/s respectively. This means it’s easier than ever to meet the requirements for acquiring and processing the high quality images needed for promising new functions such as Deep Learning. Higher performance however also comes with greater complexity and tighter timing margins in comparison to previous generations and these interfaces standards are of course always evolving. Staying on top of developments with interfaces and data transfer to keep machine vision set ups future proof now requires significant manpower.

This is why company’s such as Euresys and their Sensor to Image (S2I) division offer ready to purchase transport layer intellectual property cores (IP cores). This transport layer is essentially how the data is transferred from the FPGA to a computer via the interface, and pre-configured cores mean camera manufacturers can focus on developing the sensors interface and functionality of the camera itself. The results for an end user are higher quality cameras, with tried and tested standards, at a better price point.

Euresys Transport Layer IP Cores


The embedded future

In the future we will start to see more processing done on the camera itself, more so than the ‘smart cameras’ of the present, to aid with emerging technologies needed for Industry 4.0 that rely on networks of smart sensors. Whether it’s pre-processing of image data or application of image classifiers for Deep Learning the key aim is to reduce latency. The ability to develop these ‘smart’ capabilities and implement them as standardised IP cores promises the same benefits for current interface based logic components.

View the Euresys IP Core Range